Verification platform The ALDEC Riviera-PRO™ software product is designed to solve the problems of verifying analog-digital FPGAs and systems on a chip (SoC). Riviera-PRO provides a unique combination of efficiency, repeatability, and automation by combining a high-performance FPGA simulation engine, advanced debugging capabilities at various levels of abstraction, and support for modern standards in FPGA…

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fpga design flow

Active-HDL – universal FPGA simulator

 You can download the Free Active-HDL Student Edition of charge to see the basic features of the product or to solve simple tasks with certain limitations.   You can also request the educational licenses that the ALDEC University Program provides. User Reviews “Simulation speed in Active-HDL is really better, i.e. faster than Vivado or Quartus…” “Active-HDL editor is…

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